A CORDIC Arithmetic Processor Chip

CORDIC Processor for Variable-Precision Interval Arithmetic

In this paper we present a specific CORDIC processor for variable-precision coordinates. This system allows us to specify the precision to perform the CORDIC operation, and control the accuracy of the result, in such a way that re-computation of inaccurate results can be carried out with higher precision. It permits a reliable and accurate evaluation of a wide range of elementary functions. The...

A complex arithmetic digital signal processor using CORDIC rotators

Hardware implementation of a systolic antenna array signal processor based on CORDIC arithmetic

In this paper we present the practical hardware implementation of a systolic array for performing recursive leastsquares minimisation via orthogonal matrix triangularisation. This is an extremely demanding task for high speed, real-time operation such as required in many modern adaptive antenna, radar, and sonar systems. Since the underlying Givens rotations can be e ciently computed by the COR...

A Dual-Mode Synchronous/Asynchronous CORDIC Processor

For application in a software defined radio a CORDIC processor has been developed that can operate both in synchronous and asynchronous mode. Each mode of operation has advantages and drawbacks. Depending on the actual application, an optimal trade-off can be achieved by selecting the mode of operation that fits best with system demands. We believe that for a system developer this additional de...

A Beamformer ASIC using Cordic Arithmetic 609

| An IC implementation for a demonstrator of adaptive beamforming in radio astronomy is presented here. The chip implements the MVDR (Minimum Variance Distortion-less Response) beamforming algorithm using Cordic arithmetic. It is designed in Mentor Graphics's DSP design environment (DSP station). In the beam-forming demonstrator, signals from 16 antennas are digitized at a sampling frequency of...